Dissertation Defense
Scalable Energy-Recovery Architectures
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Energy efficiency is a critical challenge for today's integrated circuits,
especially for high-end digital signal processing and communications that require both
high throughput and low energy dissipation for extended battery life. Charge-recovery
logic recovers and reuses charge using inductive elements and has the potential to
achieve order-of-magnitude improvement in energy efficiency while maintaining high
performance. However, the lack of large-scale high-speed silicon demonstrations and
inductor area overheads are two major concerns.
This dissertation focuses on scalable charge-recovery designs. We present a
semi-automated design flow to enable the design of large-scale charge-recovery
chips. We also present a new architecture that uses in-package inductors, eliminating
the area overheads caused by the use of integrated inductors in high-performance
charge-recovery chips.
To demonstrate our semi-automated flow, which uses custom-designed standard-
cell-like dynamic cells, we have designed a 576-bit charge-recovery low-density parity-
check (LDPC) decoder chip. Functioning correctly at clock speeds above 1GHz, this
prototype is the first-ever demonstration of a GHz-speed charge-recovery chip of
significant complexity. In terms of energy consumption, this chip improves over recent
state-of-the-art LDPCs by at least 1.3— with comparable or better area efficiency.
To demonstrate our architecture for eliminating inductor overheads, we have
designed a charge-recovery LDPC decoder chip with in-package inductors. This test-
chip has been fabricated in a 65nm CMOS flip-chip process. A custom 6-layer FC-BGA
package substrate has been designed with 16 inductors embedded in the fifth layer of
the package substrate, yielding higher Q and significantly improving area efficiency and
energy efficiency compared to their on-chip counterparts. From measurements, this
chip achieves at least 2.3— lower energy consumption with even better area efficiency
over state-of-the-art published designs.