Zhengya Zhang

Circuit elements that store information in their electrical resistances enable a brain-like form of computing, storing and processing information in the same place.

Zhang is recognized with the Chia-Lun Lo Fellowship for his work designing hardware solutions that could help support computer vision and machine learning.

Prof. Zhang receives outstanding evaluations from students and opens their imagination to research in the field of VLSI circuits and systems.

Congratulations to the faculty members that received promotions this year.

Thomas and his group are working to improve upon artificial neural network design through a process called sparse coding.

Chia-Hsiang’s research focuses on designing low-power and error-resilient circuit techniques for digital signal processing applications.

All of the research being presented focuses on getting the absolute best performance from the tiniest circuits, sensors, and electronic devices.

Zhang’s research is in the area of low-power and high-performance VLSI circuits and systems.

The project proposes to produce a parallel heterogeneous 3D near-threshold computing system with unprecedented energy efficiency.

The proposed research addresses the frontiers of error-correction coding and very-large-scale integration by advancing algorithms and circuit techniques.

The resulting 65nm CMOS test chip achieved an energy efficiency of 21 pJ/bit making it a promising candidate for low-power, high-performance applications.