Design Techniques for Log Based Closed-loop Neural Stimulation System
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Although closed-loop deep brain stimulation (DBS) promises a highly efficient treatment of many neurological disorders, an implantable system-on-chip (SoC) with an effective closed-loop DBS algorithm has not been designed yet. This work introduces a logarithmic closed-loop DBS system that detects and processes low frequency brain field signals to control stimulation currents.
A fully self-contained single chip system includes 4-channel low-noise neural amplifiers (LNAs), a logarithmic ADC, 2-channel high-pass and low-pass digital logarithmic filters, a logarithmic digital signal processor (DSP) with a PI-controller, 8-channel current stimulators, an RF transceiver, a clock generator, and a power harvester. The recording path and DSP operate entirely in the log-domain to represent neural signals effectively with fewer bits while consuming less power. The proposed closed-loop neural stimulation system utilizes the LFP energy for closed-loop stimulation and log-domain computation for the first time, and achieves a single-chip operation including recording, stimulation, closed-loop processing, power harvesting, and RF communication, yet requires no external circuit components.
The 4mm2 180nm CMOS prototype consumes 468µW for recording and processing neural signals, stimulation, and for two-way wireless communication.