CMOS Switched-Capacitor Circuits: Recent Advances in Bio-Medical and RF Applications

The switched-capacitor technique has been used in high-volume data conversion and signal processing ICs for more than three decades. It is also ubiquitous in RF transceiver circuits because it uses capacitors, which are area-efficient native devices in CMOS technologies, and MOSFETs operating as switches.
The RF power amplifier dissipates a large fraction of the total power of a transceiver because of its low efficiency. Despite more than two decades of intensive research, the challenge of on-chip RF PAs with high efficiency in digital-friendly CMOS technologies has not been met. Switching PA topologies with relatively high efficiency have gained momentum, and relatively high output power is being delivered using power combining techniques. Supply regulation techniques have enabled higher efficiency when amplifying non-constant envelope modulated signals. A new paradigm"”the switched-capacitor RF power amplifier"”which meets many of the remaining challenges is described.
Body-area-networks (BAN) that integrate multiple sensor nodes in portable and wearable bio-medical systems are revolutionizing healthcare. A typical BAN comprises several bio-signal and motion sensors and uses ultra-low-power short-haul radios in conjunction with nearby smart-phones or handheld devices (with GPS capabilities) to communicate via the internet with a doctor or other healthcare professional. Higher energy efficiency is critical to the development of feature-rich, wearable and reliable personal health-monitoring systems.
The amount of data transmitted to the smart-phone increases as more sensors are added to the BAN. Because the energy consumed for RF transmission is proportional to the data rate, it is advantageous to compress the bio-signal at the sensor prior to digitization and transmission. This energy-efficient paradigm is possible using compressed sensing"”a sampling theory wherein a compressible signal can be acquired using only a few incoherent measurements. For ECG signals, for example, large compression factors are achievable which means similar reductions in energy consumption. The second part of this talk overviews compressed sensing techniques and describes a switched-capacitor analog front-end for bio-signal acquisition.

Biography:
David J. Allstot received the B.S. from the Univ. of Portland, the M.S. from Oregon State Univ. and the Ph.D. from the Univ. of California, Berkeley.
He has held several industrial and academic positions and has been the Boeing-Egtvedt Chair Professor of Engineering at the Univ. of Washington since 1999. He was Chair of the Dept. of Electrical Engineering from 2004 to 2007.
Dr. Allstot has advised approximately 60 M.S. and 40 Ph.D. graduates, published more than 300 papers, and received several awards. He has also been active in service to IEEE.

Biosketch

David J. Allstot received the B.S. (1969), M.S. (1974), and Ph.D. (1979) degrees from the Univ. of Portland, Oregon State Univ. and the Univ. of California at Berkeley, respectively. He has held several industrial and academic positions. He joined the Univ. of Washington in 1999 as Prof. of Electrical Engineering and was appointed as the Boeing-Egtvedt Chair Professor of Engineering in 2000. He served as Acting Chair and Chair of Electrical Engineering from 2004 to 2007. He has advised more than 100 M.S. and Ph.D. graduates. He served as Editor of the IEEE Transactions on Circuits and Systems, General Co-Chair of the 2002 and 2008 IEEE Intl. Symp. on Circuits and Systems, and as the 2009 President of the IEEE Circuits and Systems Society. He is a Fellow of IEEE.
Honors and Awards

IEEE W.R.G. Baker Award, 1980
Fellow of IEEE, 1992
Darlington Award, IEEE Circuits and Systems Society, 1995
Beatrice Winner Award, IEEE International Solid-State Circuits Conference, 1998
Golden Jubilee Medal, IEEE Circuits and Systems Society, 1999
50-Year Anniversary Honor Roll, IEEE Intl. Solid-State Circuits Conference, 2003
Technical Achievement Award, IEEE Circuits and Systems Society, 2004
Aristotle Award, Semiconductor Research Corp., 2005
Univ. Research Award, Semiconductor Industries Association, 2008
Research Interests

Analysis and design of RF/mixed-signal integrated systems; Design and computer-aided optimization of RF integrated circuits.

Systems-On-A-Chip Laboratory: http://analog.ee.washington.edu
Selected Publications

J. Paramesh, et al., "a four-antenna receiver in 90nm CMOS for beamforming and spatial diversity," IEEE J. Solid-State Circuits, vol. 40, pp. 2515-2524, Dec. 2005.

S. Shekhar, et al., "bandwidth extension techniques for CMOS amplifiers," IEEE J. Solid-State Circuits, vol. 41, pp. 2424-2439, Nov. 2006.

Y. Tang, et al., "cascaded complex ADCs with adaptive digital calibration for I/Q mismatch," IEEE Trans. on Circuits and Systems I: Regular Papers, vol. 55, pp. 817-827, April 2008.

D. Ozis, et al., "integrated quadrature couplers and their application in image-reject receivers," IEEE J. Solid-State Circuits, vol. 44, pp. 1464-1476, May 2009.

J.S. Walling, et al., "a class-G supply-modulator and class-E PA in 130 nm CMOS," IEEE J. Solid-State Circuits, vol. 44, pp. 2339-2347, Sept. 2009.

K.-W. Cheng, et al., "a 6.4mW quadrature GPS receiver in 0.13um CMOS," IEEE J. Solid-State Circuits, vol. 45, 2010.

C.T. Peach, et al., "an 11.1mW 42MS/s 10b ADC with two-step settling in 0.18µm CMOS," IEEE J. Solid-State Circuits, vol. 45, Feb. 2010.