Ultra-Short-Reach Interconnects for Package-Level Integration

IEEE Distinguished Lecture
Improving the functionality of solid-state systems is no longer simply a matter of cramming everything onto a single silicon die. Package-level integration of disparate technologies on either silicon interposers or organic packaging substrates is a key enabler for future networking and computing subsystems. High-performance networking and computing applications will require tremendous interconnection bandwidth between co-packaged dies. To make package-level integration seamless, transceivers for these "ultra-short-reach" links must fit within vanishingly small area and power footprints. This talk focuses on research opportunities in this emerging area and early technology demonstrations, including a 20Gb/s/wire 0.3pJ/bit single-ended die-to-die link on a silicon interposer.

Tony Chan Carusone has been a professor in the Department of Electrical and Computer Engineering at the University of Toronto since 2001. He has co-authored a total of 6 best paper award winners at the Custom Integrated Circuits Conference, Compound Semiconductor I.C. Symposium, and European Solid-State Circuits Conference. He has served as Editor-in-Chief of the IEEE Transactions on Circuits and Systems II: Express Briefs, and as a member of several technical program committees. He currently serves on the editorial board of the IEEE Journal of Solid-State Circuits, on the technical program committee for ISSCC, and as a Distinguished Lecturer for the IEEE Solid-State Circuits Society. Prof. Chan Carusone is a regular consultant to industry, and an author of the textbook "Analog Integrated Circuit Design".