Tunnel FET Modeling and Exploratory Circuit Design/Compiling Analog-to-Digital Converters

The tunnel field-effect transistor (TFET) is one of the candidates for beyond CMOS devices. The TFET devices are aimed at supply voltages less than 0.5 V which is enabled by the sub 60 mV sub-threshold swing. To design TFET circuits an analytical device model is required that accurately estimates terminal currents and charges versus terminal voltages. The Notre Dame TFET (NDTFET) model has been developed, coded in Verilog-A and made publicly available at nanohub.org. The talk starts with a brief discussion of the electrical characteristics of TFETs followed by a short description of the most important features of the NDTFET model. Afterwards, several exploratory circuit design examples are presented.

The complexity of physical circuit design is increasing with downscaling of CMOS technologies. In nanoscale CMOS, it is not uncommon to battle with more than 5000 design rules. Pre-tapeout verification used to take weeks only. With DFM and other effects, and tool feedback available only after post layout extraction, the pre-tapeout phase can be several months. As a consequence many attempts to automate analog layout have been made over the years. This talk presents a compiler for automated layout of Analog-to-digital Converter (ADCS) that is based on layout regularity and a low number of unit devices. All the input to the compiler is in text format and is split into three files: a SPICE netlist, an object definition file and a design rule file. Measured results of two compiled SAR-ADCs in 28nm FDSOI show state-of-the-art performance.

Trond Ytterdal received his M.Sc. and Ph.D. degrees in electrical engineering from the Norwegian Institute of Technology in 1990 and 1995, respectively. He was employed as a research associate at the University of Virginia (1995-1996) and as a research scientist at Rensselaer Polytechnic Institute in Troy, New York (1996-1997). From 1997 to 2001 he worked as an ASIC designer at Nordic Semiconductor in Trondheim, Norway. Since 2001 he has been on the faculty of the Norwegian University of Science and Technology, where he is a Professor at the Department of Electronic Systems. He has authored or co-authored more than 200 papers and is a co-developer of the circuit simulator AIM-Spice. His current research interests include design of analog integrated circuits, behavioral modeling and simulation of mixed-signal systems, modeling of nanoscale transistors and novel device structures. Prof. Ytterdal is a member of The Norwegian Academy of Technological Sciences and a Senior Member of IEEE.