Computer Engineering Seminar
Reading group: Synthesis, Verification and Test
Steve Plaza
WHEN:
Wednesday, September 21, 2005 @ 2:00 pm
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Paper presented:
Malay K. Ganai, The University of Texas at Austin
Viresh Paruthi, IBM Enterprise Systems Group,
Austin, TX Andreas Kuehlmann, Cadence Berkeley
Labs, Berkeley, CA Circuit-Based Boolean Reasoning
DAC 2001, pp. 232-237