Power Struggles: Designing Processors In the Energy-Constrained Future

A new understanding of physical limits is precipitating accelerated exploration of new architectural approaches. These are all disruptive changes spanning multiple system layers, and therefore necessitate fundamental changes in how we do computer architecture research. While previously architects could focus on improvements that were transparent to the programmer, the system software, and even the compiler, these more disruptive ideas require changes at every level.

In this talk, I will show how I have used analytic modeling as an approach to effectively find answers to complex computer architecture questions. First, I will discuss my work that is aimed at understanding the roots of the architectural shift. Using analytic models, I quantified the impact of technology scaling on performance and showed that these new architectural approaches were necessary. Second, I will explain how one proposed architectural approach, the machine's language–the ISA–can (or cannot!) contribute to improved performance and energy-efficiency. I will show how I distilled over 20,000 data points collected on real hardware into meaningful insights about the ISA's role. I will conclude with a discussion of how I plan to use models to effectively discover solutions to computer architecture design problems in the future.
I completed my Ph.D. at the University of Wisconsin – Madison in the Department of Computer Sciences in August 2013 and joined Google as a Software Engineer. At UW-Madison, I worked with Professor Karu Sankaralingam in the Vertical Research Group. Prior to joining UW-Madison, I received my B.S. in Engineering and B.A. in Mathematics from Swarthmore College.