Operating Below the Sub-Microwatt Barrier – Explorations in Analog Computing
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Department of Electrical and Computer Engineering; Michigan State University
ABSTRACT: Energy efficiency of information processing is a key design criterion in development of ultra-low-power autonomous sensors. While digital information processing has been the technology of choice, analog computing provides a unique path towards achieving computational efficiency that supersedes many of the state-of-the-art digital processors. In this talk I will first present an overview and limitations of analog computing and its ability to exploit computational primitives inherent in the device physics, which I will then illustrate using two specific examples. The first example is an analog system-on-chip that uses trans-linear computing principles inherent in MOS transistors biased in weak-inversion to achieve computational efficiency greater than 1 Tera multiply-accumulate per second per Watt of power. The processor operates using only 840nW of power and has been successfully used in biometric classification. The second example is an analog sensor/processor designed for infrasonic energy harvesting. Many signals of interest in structural engineering, for example seismic or biomechanical activity, lie within the infrasonic range. This poses a significant challenge for developing batteryless sensors that are required not only to monitor rare infrasonic events but also to harvest the energy for sensing, computation and storage from the signal being monitored. I will show how the physics of piezoelectric energy conversion can be integrated with physics of hot-electron injection to design fatigue-monitoring processors whose energy efficiency exceeds any other comparable technology. I will present experimental results from fabricated prototypes that demonstrate operations of the sensor beyond 10,000,000 loading cycles and a total current consumption less than 160nA.
BIO: Dr. Chakrabartty received his B.Tech degree from the Indian Institute of Technology, Delhi in 1996, and his M.S. and Ph.D. in Electrical Engineering from Johns Hopkins University, Baltimore, MD in 2002 and 2005 respectively. He is currently an Assistant Professor in the Department of Electrical and Computer Engineering at Michigan State University. From 1996–1999, he was with Qualcomm Incorporated, San Diego, CA, and during 2002, he was a visiting researcher at The University of Tokyo. His interests include low-power analog and mixed-signal computing systems with applications in biomedical and structural engineering. Dr. Chakrabartty was a Catalyst foundation fellow from 1999–2004 and has been a recipient of several National Science Foundation awards. He has published more than 80 refereed articles and serves on several technical committees of the IEEE Circuits and Systems. He is also currently serving as an associate editor for Advances in Artificial Neural Systems Journal.