Dissertation Defense
Flexible Digital-Intensive Wireless Receivers in Nanometer CMOS
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Wireless receivers designed in nanometer CMOS processes should take advantage of the strengths of more fundamentally digital topologies and intelligent digital control of analog circuitry. Analog discrete-time (DT) filters show promise because these filters consist of capacitors and switches and because configurable digital sampling clocks determine their frequency responses. We first introduce a receiver in 65nm CMOS that replaces conventional integrated baseband filters with a SAR ADC with embedded DT filtering. Then we discuss an intelligent spectrum-adaptive filtering technique, which analyzes the received signal for interferers with DT spectrum-analysis filters and sets the mode of a reconfigurable filter to reject the strongest detected interferer.