Energy-Efficient Integrated Circuits and Systems to Bridge the Gap between Power and Performance in Wireless Sensor Networks
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As we move towards ubiquitous deployment of Internet of Things (IoT) devices, ultra-low power consumption of wireless sensor nodes becomes critical. Existing low power approaches in wireless integrated circuits designs often sacrifice performance metrics, such as noise, receiver sensitivity, transmitter efficiency, etc. to achieve a lower power consumption, which is not desirable for many IoT applications. Motivated by the ultra-low power requirements of IoT applications, this research presents innovative low power circuit and system design methodologies to bridge the gap between performance and power consumption at the RF & analog circuit, and system architecture levels in wireless sensor nodes (WSN) for future IoT applications.
In support of long-range WSNs, such as low power wide area networks (LPWANs), a wireless network architecture in the MURS frequency band is proposed and developed in this work to enable long range communication at ultra-low power consumptions. This dissertation covers a MURS band receiver design with less than 200Â µW power consumption, and a novel low power quadrature digital transmitter architecture in 40nm CMOS, capable of over 10 km narrowband communications. In combination with a developed narrowband transmission scheme and the associated channel characterization, this work can serve as an alternative protocol to LPWAN technologies. In addition to power-performance optimizations in RF blocks, an ultra-low power low-noise health monitoring analog front-end (AFE) is developed and presented in this dissertation, demonstrating the feasibility of <100 nW AFEs for continuous ECG monitoring applications in energy harvesting WSNs.