Design and Simulation of Phase Locked Loops
Professor Michael H. Perrott
Assistant Professor EECS
Phase locked loops (PLL) are used in a large variety of applications ranging from wireless and wireline data links to high performance microprocessors. It is quickly becoming clear that the performance of these circuits will dictate the achievable performance of many future systems since they will set the spectral mask and A/D performance achievable in future wireless systems, and the jitter levels achievable in future data link and microprocessor applications. Yet, despite their importance in current and future systems, today's design techniques are cumbersome and difficult for beginners, and current simulation techniques are slow and inaccurate when attempting to characterize both the dynamic and noise performance of PLL circuits.
In this talk, we present a computer-aided approach to PLL system design that allows the user to quickly explore system level tradeoffs and to quickly assess, at the system level, the impact of nonidealities such as parasitic poles and parameter variations due to changes in process and temperature. We then present simulation techniques that allow fast and accurate characterization of PLL and DLL circuits at a behavioral level, with special focus being placed on fractional-N frequency synthesizers. Finally, calculated and simulated phase noise plots are compared to measured results of a custom fractional-N synthesizer to verify the accuracy of the presented techniques.
Michael H. Perrott received the B.S. degree in Electrical Engineering from New Mexico State University, Las Cruces, NM in 1988, and the M.S. and Ph.D. degrees in Electrical Engineering and Computer Science from Massachusetts Institute of Technology in 1992 and 1997, respectively. From 1997 to 1998, he worked at Hewlett-Packard Laboratories in Palo Alto, CA, on high speed circuit techniques for Sigma-Delta synthesizers. In 1999, he was a visiting Assistant Professor at the Hong Kong University of Science and Technology, and taught a course on the theory and implementation of frequency synthesizers. From 1999 to 2001, he worked at Silicon Laboratories in Austin, TX, and developed circuit and signal processing techniques to achieve high performance clock and data recovery circuits. He is currently an Assistant Professor in Electrical Engineering and Computer Science at the Massachusetts Institute of Technology, and focuses on high speed circuit and signal processing techniques for data links and wireless applications.