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EECS 579: Digital System Testing
Instructor: Professor John P. Hayes
Coverage
This course examines the theory and practice of fault analysis, test generation, and design for testability for digital circuits and systems.
Lab
A term project or paper is required which is tailored to individual student interests, and typically involve one of the following:
A. Programming a test generation or simulation algorithm covered in the course
B. In-depth literature survey of some advanced topic
C. Individual research into some special topic or problem
D. Experiments with commercial test and simulation CAD hardware or software
All projects require a written report and an oral presentation to the class at the end of the term. Item D is subject to availability of the hardware and software needed.
Textbook(s)
Bushnell, Michael L., and Vishwani D. Agrawal. Essentials of Electronic Testing for Digital, Memory, and Mixed-signal VLSI Circuits. New York, NY: Springer, 2000.
Syllabus
This course examines the theory and practice of fault analysis, test generation, and design for testability for digital circuits and systems. The topics to be covered include: circuit and system modeling; fault sources and models; fault simulation methods; test generation algorithms for combinational and sequential circuits, including PODEM; testability measures; design-for-testability techniques; built-in self-testing (BIST); processor and memory testing, design verification, special topics. Current research issues, including topics suitable for M.S. or Ph.D. research will be discussed. A term project or paper is also part of the course.
| Lecture Plan | |
| Topic | Bushnell/Agrawal Book |
| Introduction | Chap. 1, 2, 3 |
| Fault modeling | Chap. 4 |
| Combinational circuit testing | Chap. 6, 7 |
| Sequential circuit testing | Chap. 8 |
| Delay testing | Chap. 12 |
| System testing | Chap. 9, 18 |
| Design for testability | Chap. 6, 14 |
| Built-in self-testing | Chap. 15, 16 |
| Fault simulation | Chap. 5 |
| Misc. topics | TBA |